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IDT74FCT163646A/C 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER
IDT74FCT163646A/C
* 0.5 MICRON CMOS Technology * Typical tSK(o) (Output Skew) < 250ps * ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * VCC = 3.3V 0.3V, Normal Range, or VCC = 2.7V to 3.6V, Extended Range * CMOS power levels (0.4 W typ. static) * Rail-to-rail output swing for increased noise margin * Low Ground Bounce (0.3V typ.) * Inputs (except I/O) can be driven by 3.3V or 5V components * Available in SSOP and TSSOP packages
FEATURES:
DESCRIPTION:
The FCT163646 16-bit registered transceiver is built using advanced dual metal CMOS technology. These high-speed, low-power devices are organized as two independant 8-bit bus transceivers with 3-state D-type registers. The control circuitry is organized for multiplexed transmission of data between A bus and B bus either directly or from the internal storage registers. Each 8-bit transceiver/register features direction control (xDIR), over-riding Output Enable control (xOE) and Select lines (xSAB and xSBA) to select either real-time data or stored data. Separate clock inputs are provided for A and B port registers. Data on the A or B data bus, or both, can be stored in the internal registers by the low-to-high transitions at the appropriate clock pins. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT163646 has series current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall timesreducing the need for external series terminating resistors.
FUNCTIONAL BLOCK DIAGRAM
56 1OE 1 1DIR 55 1CLKBA 1SBA 1CLKAB 3 1SAB B REG 2SAB 54 2 2SBA 2CLKBA 2DIR 2OE
29 28
30 31 27 2CLKAB 26 B REG
D C
1A1 5 A REG 52 1B1 15 2A1 A REG
D C
42 2B1
D C
D C
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
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(c) 2002 Integrated Device Technology, Inc.
APRIL 2002
DSC-2778/1
IDT74FCT163646A/C 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
1DIR 1CLKAB
1SAB
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max -0.5 to +4.6 -0.5 to 7 -0.5 to VCC+0.5 -65 to +150 -60 to +60 Unit V V V C mA
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 1OE 1CLKBA
1SBA
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
VTERM(2) VTERM(3) VTERM(4) TSTG IOUT
GND
1A1 1A2
GND
1B1 1B2
VCC
1A3 1A4 1A5
VCC
1B3 1B4 1B5
GND
1A6 1A7 1A8 2A1 2A2 2A3
GND
1B6 1B7 1B8 2B1 2B2 2B3
NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Vcc terminals. 3. Input terminals. 4. Outputs and I/O terminals.
CAPACITANCE (TA = +25C, F = 1.0MHz)
Symbol CIN COUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 3.5 3.5 Max. 6 8 Unit pF pF
GND
2A4 2A5 2A6
GND
2B4 2B5 2B6
NOTE: 1. This parameter is measured at characterization but not tested.
VCC
2A7 2A8
VCC
2B7 2B8
PIN DESCRIPTION
Pin Names xAx xBx xCAB, xCBA xSAB, xSBA xDIR , xOE Description Data Register A Inputs, Data Register B Outputs Data Register B Inputs, Data Register A Outputs Clock Pulse Inputs Output Data Source Select Inputs Output Enable Inputs
GND
2SAB 2CLKAB 2DIR
GND
2SBA 2CLKBA 2OE
SSOP/ TSSOP TOP VIEW
FUNCTION TABLE(1)
xOE H H L L L L xDIR X X L L H H Inputs xCLKAB xCLKBA H or L H or L X X X H or L X H or L X X Data I/O xSAB X X X X L H xSBA X X L H X X Output Input Input Output xAx Input
(2)
xBx Input
Operation or Function Isolation Store A and B Data Real Time B Data to A Bus Stored B Data to A Bus Real Time A Data to B Bus Stored A Data to B Bus
NOTES: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care = LOW-to-HIGH Transition 2. The data output functions may be enabled or disabled by various signals at the xOE or xDIR inputs. Data input functions are always enabled, i.e. data at the bus pins will be stored on every LOW-to-HIGH transition of the clock inputs.
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IDT74FCT163646A/C 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Industrial: TA = -40C to +85C, VCC = 2.7V to 3.6V
Symbol VIH VIL IIH IIL IOZH IOZL VIK IODH IODL VOH Parameter Input HIGH Level (Input pins) Input HIGH Level (I/O pins) Input LOW Level (Input and I/O pins) Guaranteed Logic LOW Level Input HIGH Current (Input pins) Input HIGH Current (I/O pins) Input LOW Current (Input pins) Input LOW Current (I/O pins) High Impedance Output Current (3-State Output pins) Clamp Diode Voltage Output HIGH Current Output LOW Current Output HIGH Voltage VCC = Min., IIN = -18mA VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V VCC = Min. VIN = VIH or VIL VCC = 3V VIN = VIH or VIL VOL Output LOW Voltage VCC = Min. VIN = VIH or VIL VCC = 3V VIN = VIH or VIL IOS VH ICCL ICCH ICCZ Short Circuit Current Input Hysteresis Quiescent Power Supply Current VCC = Max. VIN = GND or VCC
(4) (3) (3)
Test Conditions(1) Guaranteed Logic HIGH Level
Min. 2 2 -0.5
Typ.(2) -- -- -- -- -- -- -- -- -- -0.7 -60 90 -- 3 3 -- 0.2 0.3 0.3 -135 150 0.1
Max. 5.5 VCC+0.5 0.8 1 1 1 1 1 1 -1.2 -110 200 -- -- -- 0.2 0.4 0.55 0.5 -240 -- 10
Unit V V A
VCC = Max.
VI = 5.5V VI = VCC VI = GND VI = GND
-- -- -- -- -- -- -- -36 50 VCC-0.2 2.4 2.4
(5)
VCC = Max.
VO = VCC VO = GND
A
V mA mA V
IOH = -0.1mA IOH = -3mA IOH = -8mA IOL = 0.1mA IOL = 16mA IOL = 24mA IOL = 24mA
-- -- -- -- -60
V
VCC = Max., VO = GND(3) --
mA mV A
-- --
NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = VCC-0.6V at rated current.
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IDT74FCT163646A/C 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER
INDUSTRIAL TEMPERATURE RANGE
BUS A
BUS B
BUS A
BU S B
xDIR L
xOE L
xCLKAB X
xCLKBA X
xSAB X
xSBA L
xDIR H
xOE L
xCLKAB X
xCLKBA X
xSAB L
xSBA X
Real-Time Transfer Bus B to A
Real-Time Transfer Bus A to B
BUS A
BUS B
BUS A
BUS B
xDIR H L X
xOE L L H
xCLKAB
xCLKBA X

X
xSAB X X X
xSBA X X X
xDIR L H
(1)
xOE L L
xCLKAB X H or L
xCLKBA H or L X
xSAB X H
xSBA H X
Storage from A and/or B
Transfer Stored Data to A and/or B
NOTE: 1. Cannot transfer data to A bus and B bus simultaneously.
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IDT74FCT163646A/C 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) VCC = Max. VIN = VCC - 0.6V(3) VCC = Max. Outputs Open xDIR = xOE = GND One Input Togging 50% Duty Cycle VCC = Max.,Outputs Open fCP = 10MHz (xCLKBA) 50% Duty Cycle xDIR = xOE = GND fI = 5MHz 50% Duty Cycle One Bit Toggling VCC = Max.,Outputs Open fCP = 10MHz (xCLKBA) 50% Duty Cycle xDIR = xOE = GND fI = 2.5MHz 50% Duty Cycle Sixteen Bits Toggling
NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25C ambient. 3. Per TTL driven input. All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ICC = Power Supply Current for a TTL High Input DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi
Test Conditions(1)
Min. --
Typ.(2) 2 60
Max. 30 100
Unit A A/ MHz
VIN = VCC VIN = GND
--
IC
Total Power Supply Current(6)
VIN = VCC VIN = GND
--
0.6
1
mA
VIN = VCC - 0.6V VIN = GND VIN = VCC VIN = GND
--
0.6
1
--
3
5(5)
VIN = VCC - 0.6V VIN = GND
--
3
5.3(5)
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IDT74FCT163646A/C 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE(1)
Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tPLH tPHL tPLH tPHL tSU tH tW tSK(o) Parameter Propagation Delay Bus to Bus Output Enable Time xDIR or xOE to Bus Output Disable Time xDIR or xOE to Bus Propagation Delay Clock to Bus Propagation Delay xSBA or xSAB to Bus Set-up Time HIGH or LOW, Bus to Clock Hold Time HIGH or LOW, Bus to Clock Clock Pulse Width HIGH or LOW Output Skew(4) Condition(2) CL = 50pF RL = 500 FCT163646A Min.(3) Max. 2 6.3 2 2 2 2 2 1.5 5 -- 9.8 6.3 6.3 7.7 -- -- -- 0.5 FCT163646C Min.(3) Max. 1.5 5.4 1.5 1.5 1.5 1.5 2 1.5 5 -- 7.8 6.3 5.7 6.2 -- -- -- 0.5 Unit ns ns ns ns ns ns ns ns ns
NOTES: 1. Propagation Delays and Enable/Disable times are with VCC = 3.3V 0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays and Enable/Disable times should be degraded by 20%. 2. See test circuit and waveforms. 3. Minimum limits are guaranteed but not tested on Propagation Delays. 4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
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IDT74FCT163646A/C 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
V CC 500 VIN Pulse Generator RT D.U.T. 50pF CL 500 VOUT 6v Open GND
SWITCH POSITION
Test Open Drain Disable Low Enable Low Disable High Enable High All Other Tests Switch 6V GND Open
DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Circuits for All Outputs
DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC.
tSU
tH
tREM
3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V
LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE
1.5V
1.5V
tSU
tH
Pulse Width
Set-up, Hold, and Release Times
ENABLE SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL 3V 1.5V 0V VOH 1.5V VOL 3V 1.5V 0V CONTROL INPUT tPZL OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH SWITCH 6V tPZH SWITCH GND 3V 1.5V tPHZ 0.3V 1.5V 0V 0V VOH tPLZ DISABLE 3V 1.5V 0V 3V 0.3V VOL
Propagation Delay
Enable and Disable Times
NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns. 3. if VCC is below 3V, input voltage swings should be adjusted not to exceed VCC.
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IDT74FCT163646A/C 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT XX FCT XXX Temp. Range Family XXXX X Device Type Package
PV PA
Shrink Small Outline Package Thin Shrink Small Outline Package
646A 646C
Non-Inverting 16-Bit Transceiver/Register
163 74
Double-Density 3.3Volt - 40C to +85C
DATA SHEET DOCUMENT HISTORY
4/19/2002 Removed B speed grade
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